RISC OS 3.70 and 3.71
Released 1996 - RiscPC, A7000 and A7000+ class
RISC OS 3.70 is included with the following products.
Additionally RISC OS 3.71 is also compatible with:
The following support documents relate to this version of RISC OS:
Further support documents for RISC OS users can be found here.
RISC OS 3.7 was outwardly almost identical to RISC OS 3.6. There were a few minor bug fixes but its primary reason for existence was to accommodate the new StrongARM processor which Acorn introduced to the RiscPC in 1996 and which would not work with RISC OS 3.6. This necessitated some re-writing of the code although RISC OS 3.70 was 100% backward compatible with the 610, 710 and 7500 processors.
The StrongArm was the first non ARM processor to be supported by RISC OS. The StrongARM was developed by DEC (Digital Equipment Corporation) using technology licenced by ARM Ltd. As well as being the first processor not designed directly by ARM the StrongARM also marks another first. In 1997 the rights to the StrongARM were purchased by Intel. Which meant that RiscPCs supplied from late 1997 onwards had an Intel processor, much to the annoyance of some die hard RISC OS users.
The StrongARM was intended for embedded systems but by a happy coincidence was perfect for RISC OS. The StrongARM included two 16KB caches, one for data and one for instructions. The entire BBC BASIC language could fit into one cache with astounding speed improvements for BASIC programs. Generally the StrongARM was some three to five times the speed of the ARM 710. In some tests BBC BASIC could perform 50 times faster than when run on an ARM 710.
RISC OS 3.60 continued to be shipped with the 600 and 700 models whilst RISC OS 3.70 was only included with new StrongARM RiscPCs.
The StrongARM processor provided a much needed power boost for the RiscPC and, as it was a simple matter for the user to replace the CPU, Acorn produced an upgrade pack for older machines. This consisted of a 202Mhz StrongARM processor card, pair of RISC OS 3.7 ROMS, replacement !Boot sequence on floppy discs, instructions and an anti-static wrist strap. The wrist strap was included as the StrongARM chip was apparently very sensitive to static discharge which could ruin the chip.
A year after the launch of the StrongARM Acorn replaced the A7000 with the A7000+ .Although the A7000+ was very similar to its predecessor it used the later ARM 7500FE processor which was one of the very few ARM processors (and the only one used by Acorn) to have a built in floating point unit. As many schools used these machines as discless workstations it was not felt desirable to load the necessary code for the FPU from disc and so it was incorporated into the new OS ROM which became RISC OS 3.71.
As the opportunity was taken to also include the various minor patches and fixes which had been applied to RISC OS 3.70 and as the 3.71 variant works perfectly in the RiscPC as well as the A7000+ it is often retro-fitted by users to these machines. Similarly some time later when Acorn used up their stock of RISC OS 3.70 ROMs they switched to 3.71 and so this version was shipped with many of the later 233 MHz Strong ARM RiscPCs.
There are no user facing differences between RISC OS 3.70 and 3.71.
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